Applied Reconfigurable Computing (ARC) is a cross-cutting field that spans several research and technology domains, offering solutions for systems that require enhanced computational efficiency, reduced latency, or adaptive hardware capability. These domains include artificial intelligence, high-performance computing, digital signal processing, communications, control, hardware security, among others.

The 22nd edition of the symposium aims to bring together researchers and practitioners of reconfigurable computing with an emphasis on practical applications of this technology.

The ARC 2026 proceedings will be published as a volume in Springer’s Lecture Notes in Computer Science (LNCS) series and will also be available through the SpringerLink online service.  

CALL FOR PAPERS

Authors are invited to submit original contributions in English including, but not limited to, the areas of interest mentioned below. 

Submission must be uploaded via EasyChair (https://easychair.org/my2/conference?conf=arc2026 ) .

Contributions must be prepared according to the accepted formats, as either 

•  Long Papers: (15 pages maximum excluding references) should include novel research supported by strong empirical results (oral presentation).

• Short Papers: (10 pages maximum excluding references) for work in progress or reporting recent developments (poster presentation).

The format of the paper should be compliant with the Springer-Verlag LNCS Series format rules (http://www.springer.com/comp/lncs/authors.html).
Submissions must be fully anonymous, but authors should not hide previous work, instead, they need to make self-references in the third person. 

IMPORTANT DATES

Reported deadlines are final, no extensions will be given.

• Abstract deadline: 8 February 2026

• Submission deadline: 15 February 2026

• Decision notification: 9 March 2026

• Author registration: 18 March 2026

• Camera-ready paper submission: 18 March 2026

TOPICS OF INTEREST

Design Methods & Tools

• EDA Tools & Algorithms

• High-level Languages & Compilation

• Design Space Exploration

• Run-Time Systems & Virtualization

• Profiling & Power Analysis

Applications

• AI-based Applications

• Online and Continual learning

• Generative AI

• Embedded Computing & DSP

• Robotics, Space, Bioinformatics & Automotive

• Security & Cryptography

• Big-Data & HPC

Architectures

• Self-adaptive, Evolvable/Adaptive Programmable SoCs

• Programmable-Logic-Optimized Soft-Core and Core Extensions

• Low-power Designs

• Computation in/near Memory

• Approximate Computing

• Fine-/Coarse-/Mixed-grained Designs

• Interconnects

• Real-Time & Mixed-Criticality Designs

• Resilient & Fault-Tolerant Designs 

COMMITTEE

General Chair

Paolo Meloni, University of Cagliari

Program Chairs

Gianluca Leone, University of Cagliari

Andrés Otero, Universidad Politecnica de Madrid